After mucking around in the guts of PX4 for quite a while now for Beaglebone, I wonder if anyone knows what it would take to make PX4 run on a lower-end part, like the STM32F405 chip that so many *flight releases are currently targeting.
If the challenge is nothing more than memory footprint, then I think I can resolve that by turning off legacy modules, and/or using smaller, platform type-specific builds.
Are the peripheral and memory maps all that different from the '427?
Before I dive into a research exercise, I’d like to know if anyone has already concluded that it’s not a worthy endeavor…
The Crazyflie is an stm32f405 and has decent PX4 support. https://docs.px4.io/en/flight_controller/crazyflie2.html
The biggest barrier I see is getting the code size under control, which actually circles back to the driver discussion. Removing the boilerplate from the Devices is probably the easiest win for code size reduction.
I’ve been playing with Bloaty (https://github.com/google/bloaty) to figure out where it’s all going. I was thinking about adding it to the new CI system (http://ci.px4.io:8080/blue/organizations/jenkins/Firmware/detail/master/139/pipeline) so that it’s easy to keep an eye on.
I started out my MATEKF405 port using CF2 as a reference, and didn’t get very far because the Matek board uses SPI pretty heavily, and there’s no SPI used at all on the CF2 so far as I can tell.
But, it was a start. Still a work in progress, too…