Sensor and Architecture Notes from DevSummit Workshop

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These are notes captured from sensor&architecture discussion focus group from DevSummit preconference workshop. The action items should be followed up in weekly dev-calls. The session was chaired by @dagar. (notes by @Stifael)

Old Architecture

There was a lot of CPU waste for reading sensor data. Depending on the Microcontroller, almost 60 percent of the CPU load was used for simple data reading.

The main reason for the huge CPU waste is the time it takes to complete the ISR (Interrupt Service Routine). In Nuttx, the ISR is active once HRT (High Resolution Timer) triggers Interrupt-Request (IRQ) until the sensor data is published. There can only be one ISR at a time.

In Nuttx, there are three vector tables involved during an interrupt: a common vector table (VTAB) and two tables where one points to an address and the other contains its context.

New Architecture

The main difference is that the ISR logic is moved from CPU to DMA and therefore frees the CPU load from reading new sensor data. In addition there is now one Nuttx work queue with one worker thread per bus. With this method, the architecture can provide faster response overall. On the other hand, there is the drawback that more stack has to be allocated. With each work-item (= thread), more stack has to be added.

Action:

  • Document new Architecture

    • Pros and cons
  • Look for Nuttx alternatives for dealing with legacy drivers…

    • Does not need to be posix compliant
  • Driver unification (reduce duplicate code)

Drawing

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PX4 Dev Call: July 3, 2019