Hello. I really confused with quantity of available CAN buses in FMU-v5.
I clearly see, that FMU-v5 source code defines all 3 CANs at STM32F7.
#define GPIO_CAN1_RX GPIO_CAN1_RX_5 /* PI9 */ #define GPIO_CAN1_TX GPIO_CAN1_TX_4 /* PH13 */ #define GPIO_CAN2_RX GPIO_CAN2_RX_1 /* PB12 */ #define GPIO_CAN2_TX GPIO_CAN2_TX_1 /* PB13 */ #define GPIO_CAN3_RX GPIO_CAN3_RX_1 /* PA8 */ #define GPIO_CAN3_TX GPIO_CAN3_TX_1 /* PA15 */
and defines UAVCAN_STM32_NUM_IFACES =2
But also I see, that libuavcan allows set only 2 CANs, described with UAVCAN_STM32_NUM_IFACES. This cannot contain value “3” (for CAN3 if we want). But FMU-v5 code initializes all 3 CANs… Or FMU-v5 code dont works and it really releases only 2 CANs???
Hence
#define GPIO_CAN3_RX GPIO_CAN3_RX_1
is fail and unused…
Right??
